IN IN IREF IREF LED Short-Detection Threshold-Adjust Input. Bypass IN with a minimum of 2.2μF in parallel with 0.1μF placed close to the pin. Connect GND, LEDGND, and PGND at a single point. PGND is the DRAIN current return path connection. ISET ISET IMON_ IMON_ REFERENCE CURRENT GENERATION REFERENCE CURRENT GENERATION IREF_ IREF_ BANDGAP BANDGAP THERMAL SENSOR THERMAL SENSOR 20MHz CLOCK 20MHz CLOCK CHARGE PUMP CHARGE PUMP Power Ground. Place the resistor close to the pin to avoid parasitic capacitance. Connect a resistor (RISET) from ISET to GND to set the current through each LED string (ILED), according to the formula ILED = 1500/RISET. Connect DIM to a logic supply of 5V or lower if dimming control is not used. Apply a PWM signal to DIM for LED dimming control. NGATE NGATE 0.35V 0.35V UV UV Digital PWM Dimming Input. RT RT COMPARATOR ARRAY COMPARATOR ARRAY SHORTGND SHORTGND 4 4 LEDSHORT LEDSHORT LEDOPEN LEDOPEN LEDUNUSED LEDUNUSED 4 4 4 4 DAC DAC 9 9 COMPH COMPH COMPL COMPL LODIM LODIM BOOSTON BOOSTON SSDONE SSDONE Gate Connection for External Series nMOSFET. Apply an AC-coupled external clock at RT to synchronize the switching frequency with an external clock. Connect a timing resistor (RT) to GND to program the switching frequency. GND GND Oscillator Timing Resistor Connection. GND is the current return path connection for the low-noise analog signals. Connect the compensation network from COMP to GND for current-mode control (see the Feedback Compensation section). FLTB FLTB EAREF EAREF BOOST OSC BOOST OSC PWM PWM Switching Converter Compensation Input. Connect a pullup resistor from FLTB to a logic supply of 5V or lower. FLTB asserts low when a fault is detected. Connect 1μF and 0.1μF capacitors from V18 to GND with the 0.1μF capacitor placed closest to the pin. COMP COMP Output of Internal 1.8V Regulator. BSTMON BSTMON ILIMLV I LIMLV Switching Converter Compensation Input. Connect a resistor-divider from the boost converter output to GND with its midpoint connected to the BSTMON pin in order to set the maximum boost output voltage. LEDGND LEDGND CONTROL LOGIC CONTROL LOGIC POR POR DRIVE LOGIC DRIVE LOGIC OUT_ OUT_ 4 4 MAX25510/1 MAX25510 MAX25511 g g M Boost Voltage Monitoring Input. LEDGND is the return path connection for the linear current sinks. EN EN V18 UVLO V18 UVLO Output of Internal 1.8V Regulator.

When EN is taken low, the device is disabled after a delay of tEN_OFF. Connect EN to logic-high for normal operation.

Phase shift controller setup